Ana Lucia Varbanescu
Latest
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The paper 'PEIR: Modeling Performance in Neural Information Retrieval' was accepted at ECIR 2025.
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The paper 'Analyzing Per-Application Energy Consumption in a Multi-Application Computing Continuum' was accepted at IEEE FMEC '24.
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The paper 'Distillation vs. Sampling for Efficient Training of Learning to Rank Models' was accepted at ACM ICTIR '24.
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The paper 'Using Evolutionary Algorithms to Find Cache-Friendly Generalized Morton Layouts for Arrays' was accepted for ACM/SPEC ICPE '24.
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Analyzing Per-Application Energy Consumption in a Multi-Application Computing Continuum
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Distillation vs. Sampling for Efficient Training of Learning to Rank Models
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Using Evolutionary Algorithms to Find Cache-Friendly Generalized Morton Layouts for Arrays
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The paper 'Systematically Exploring High-Performance Representations of Vector Fields Through Compile-Time Composition' was nominated for the Best Paper Award at ACM/SPEC ICPE 2023!
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The paper 'Systematically Exploring High-Performance Representations of Vector Fields Through Compile-Time Composition' was accepted at ACM/SPEC ICPE 2023.
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The paper 'Modelling Performance Loss due to Thread Imbalance in Stochastic Variable-Length SIMT Workloads' was accepted for MASCOTS '22.
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The paper 'Building Fine-Grained Analytical Performance Models for Complex Scientific Applications' was accepted at PPAM '22.
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The paper 'ParClick: A Scalable Algorithm for EM-based Click Models' was accepted for the ACM Web Conference '22.
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EnergyLabels
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Analytical Performance Estimation for Large-Scale Reconfigurable Dataflow Platforms
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High Performance Computing - 36th International Conference, ISC High Performance 2021, Virtual Event, June 24 - July 2, 2021, Proceedings
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ICPE '21: ACM/SPEC International Conference on Performance Engineering, Virtual Event, France, April 19-21, 2021
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ICPE '21: ACM/SPEC International Conference on Performance Engineering, Virtual Event, France, April 19-21, 2021, Companion Volume
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The future is big graphs: a community view on graph processing systems
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The paper 'μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration' was accepted for Euromicro DSD 2020.
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The paper 'A Sampling-Based Tool for Scaling Graph Datasets' was accepted for ACM/SPEC ICPE 2020.
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(μ)-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration
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A Sampling-Based Tool for Scaling Graph Datasets
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Designing and building application-centric parallel memories
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A Beginner's Guide to Estimating and Improving Performance Portability
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Exploring HPC and Big Data Convergence: A Graph Processing Study on Intel Knights Landing
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EXTRA: an open platform for reconfigurable architectures
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HLS Support for Polymorphic Parallel Memories
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MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs
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Mix-and-Match: A Model-Driven Runtime Optimisation Strategy for BFS on GPUs
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Performance Estimation for Exascale Reconfigurable Dataflow Platforms
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Performance Prediction for Large-Scale Heterogeneous Platforms
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Towards Application-Centric Parallel Memories
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AstroHPC'12 foreword
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A4MMC foreword
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Towards an effective unified programming model for many-cores
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Building high-resolution sky images using the Cell/B.E.
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Radioastronomy image synthesis on the cell/B.E.