On mapping distributed S-Net to the 48-core Intel SCC processor

Abstract

Distributed S-NET is a declarative coordinationlanguage and component technology primarily aimed at modernmulti-core/many-core chip architectures. It builds on the conceptof stream processing to structure dynamically evolving networksof communicating asynchronous components. These componentsthemselves are implemented using a conventional language suitablefor the application domain. Our goal is to map DistributedS-NET to the Intel SCC processor in order to provide users witha simplified programming environment, yet still allowing themto make use of the advanced features of the SCC architecture.Following a brief introduction to the design principles ofS-NET, we sketch out the general ideas of our implementationapproach. These mainly concern the use of SCC’s messagepassing buffers for lightweight communication of S-NET recordsand control data between cores as well as remapping of largedata structures through lookup table manipulation. The latteravoids costly memory copy operations that would result frommore traditional message passing approaches. Last, but notleast, we present prototypical performance measurements for ourcommunication primitives.

Publication
3rd Many-core Applications Research Community (MARC) Symposium