Towards Exploring Vast MPSoC Mapping Design Spaces using a Bias-Elitist Evolutionary Approach

Abstract

The problem of optimally mapping a set of tasks onto a set of given heterogeneous processors for maximal throughput has been known, in general, to be NP-complete. Previous research has shown that Genetic Algorithms (GA) typically are a good choice to solve this problem when the solution space is relatively small. However, when the size of the problem space increases, classic genetic algorithms still suffer from the problem of long evolution times. To address this problem, this paper proposes a novel bias-elitist genetic algorithm that is guided by domain-specific heuristics to speed up the evolution process. Experimental results reveal that our proposed algorithm is able to handle large scale task mapping problems and produces high-quality mapping solutions in only a short time period.

Publication
2014 17th Euromicro Conference on Digital System Design: DSD 2014: proceedings: 27-29 August 2014, Verona, Italy